SiFive To Introduce New RISC-V Processor Architecture and RISC-V PC at Linley Fall Virtual Processor Conference

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SiFive Founders and Inventors of RISC-V will deep dive new vector-based architecture, and debut new SoC for professional developers of RISC-V applications

SAN MATEO, Calif. Sep 14, 2020 – SiFive, Inc., the leading provider of commercial RISC-V processor IP, today announced that Dr. Yunsup Lee, CTO of SiFive, and Dr. Krste Asanovic, Chief Architect of SiFive, will present at the technology industry’s premier processor conference, the Linley Fall Virtual Processor Conference. The conference will be held on October 20th – 22nd and 27th – 29th, 2020 and will feature high-quality technical content from leading semiconductor companies worldwide..

Industry demand for AI performance has skyrocketed over the last few years driven by rapid adoption from the data center to the edge. This year’s Linley Fall Processor Conference will feature our biggest program yet and will introduce a host of new technology disclosures and product announcements of innovative processor architectures and IP technologies,” said Linley Gwennap, principal analyst and conference chairperson. “In spite of the challenges posed by the pandemic, development of these technologies continues to accelerate and we’re excited to be sharing these presentations with a global audience via our live-streamed format.

SiFive’s portfolio of processor Core IP is based on the free and open RISC-V instruction set architecture, and consists of four unique micro-architectures designed to enable different classes of performance, efficiency, and features for application and deeply embedded uses. Designed for scalability, SiFive Core IP can be tailored to workload requirements through the highly-configurable parameters of the architecture.

The combination of scalable vector processing with a Linux-capable superscalar multi-core processor opens up a wide range of design points and applications for RISC-V. This new processor core features a complete implementation of the latest RISC-V Vector (RVV) extension. Presented by Dr. Krste Asanovic, SiFive Intelligence is slated for production use based on the fully ratified version of the RVV specification and enables a single processing and development environment for scalar and high-performance vector processing applications. Recently, SiFive announced a collaboration with the Barcelona Supercomputing Center to create a new API for popular compilers, further enabling applications to use the RISC-V Vector Extension currently under development for high-performance computing, artificial intelligence, and computer vision applications.

“SiFive Intelligence will offer a high-performance converged processor core capable of flexible execution of many workloads based on a single, industry-standard ISA,” said Chris Lattner, President and Senior Vice President, Platform Engineering at SiFive. “This is a transformative option for the technology industry as innovators look for ways to build solutions to intense computational challenges, from deep learning in the datacenter to image, video, or audio processing at the edge.”

New processor architectures require access to development environments to create and optimize software. The SiFive Freedom U740 next-generation SoC will enable professional developers to create RISC-V applications from bare-metal to Linux-based, including porting of existing applications. The FU740 combines a heterogeneous mix+match core complex with modern PC expansion capabilities and form factor with a suite of included tools to facilitate broad professional software development. Presented by Dr. Yunsup Lee, SiFive will debut the world’s first RISC-V PC, based on the upcoming new FU740, which will be publicly demonstrated at the Linley Conference. The SiFive FU740 will enable professional developers to create RISC-V applications in a bare-metal environment, from OS to end-user application, using powerful SiFive U7-series processor cores.

Registration for The Linley Group Fall Virtual Processor Conference is free and open now for qualified registrants. The conference is intended for chip designers, system designers, equipment vendors, OEM/ODMs, service providers, press, and the financial community.

SiFive is the leading provider of processor cores, accelerators, and SoC IP to create domain-specific architecture based on the free and open RISC-V instruction set architecture. SiFive offers scalable, configurable processor cores pre-integrated with security, trace, and debug features for workload-specific accelerator designs. Founded by the inventors of RISC-V, SiFive has 15 design centers worldwide and backing from Sutter Hill Ventures, SK hynix, Qualcomm Ventures, Western Digital, Intel Capital, Spark Capital, Osage University Partners, and Prosperity7 Ventures. For more information, please visit

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RISC-V, Computer, SiFive, Computer architecture, Reduced instruction set computer

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